EDA4SEC | Linksium
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EDA4SEC

Maturation

A design support tool for the security of integrated circuits

profilePhoto   Gisela Schach
Linksium Contact Gisela Schach +33 (0)6 33 63 44 99 gisela.schach@linksium.fr
Image FP Linksium Adi Goldstein

Benefits

  • Early identification of hardware vulnerabilities in the design flow
  • Automatic correction of the RTL description of the circuit under design

Key words

  • Hardware security
  • Integrated circuit design
  • EDA
  • Cybersecurity

Laboratory

  • LCIS

Institutions

  • GRENOBLE INP
  • UGA

Linksium Continuum

  • Maturation

Context

Hardware security issues are becoming increasingly important for system-on-chip designers. Numerous design tools are available to support designers to ensure that the designed circuit meets all functional and non-functional specifications. It is therefore necessary to complement these tools to address hardware security issues and help designers identify potential vulnerabilities as quickly as possible and thus optimize countermeasures.

Technology

EDA4Sec is a tool that can be inserted into industrial design flows to identify possible hardware vulnerabilities using information from standard design tools. This structural information is analyzed and combined to highlight potential security issues.

Advantages

EDA4SEC intervenes early in the design flow using information from RTL analyses. The modular and dynamic tool can integrate many models and types of attacks (fault attacks, hidden channel attacks, test channels or malicious logic insertion). Also, thanks to a feedback loop with the analyzed RTL, EDA4Sec can insert targeted countermeasures in the circuit.

State of progress

Elementary bricks specific to types of attacks have already been developed (specific fault attacks, estimation of the presence of malicious logic, sensitivity to hidden channel attacks, test and debug channel leaks). A tool integrating all these analyses and allowing to include new ones is under development. The maturation will allow to integrate existing tools, to enrich the models on any type of attack and to enlarge the field of countermeasures.

Applications

The tool developed proposes integrated circuit designers an innovative solution for securing connected objects against hardware attacks. It is capable of analyzing the circuit under design to detect hardware security flaws and then systematically insert optimized countermeasures.

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